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Once the proper K P and K I values are determined, we still may want to check the system dynamic behavior and verify if a stable closed loop controller with the desired speed of response has been obtained. In order to do that, before developing any converter prototype, it is very convenient to use one of the several dynamic system software simulators available. The simulation of the VSI depicted in Fig. 1, together with its current controller, gives the results described by Fig. 11. In particular, Fig.
We denote by variable d the duty-cycle of a switching converter, like the one considered in our discussion, whose desired set-point is the particular value we need to apply to bring the converter to the steady state. 5: Example of limit cycle occurrence. The desired set-point for the output control variable d is not one of the possible output values. Consequently, the system oscillates, with period TLCO , between the two closest outputs. Here we assume that the system includes at least one integral action in the transfer function from the input to the output.
Please note that, even if the sampling and switching frequencies are set equal, there still can be a zero frequency error in the reconstruction of the average sampled signal, in case the sampling instants are not coincident with the beginning and/or the half of the modulation period. This is generally a minor problem, since the current regulator will often be driven by an external loop (see Chapter 5) that, typically including an integral action, will compensate for any steady-state (or very low frequency) error in the current trajectory.